/ˌpiː eɪ ɛm ˈfɔːr/
n. "Four-level pulse amplitude modulation encoding two bits per symbol via voltage levels unlike binary NRZ."
PAM4, short for Pulse Amplitude Modulation 4-level, transmits 56Gbps+ over single lanes by mapping 00/01/10/11 to four distinct voltages—SerDes DSP applies FFE/CTLE/DFE to open three squeezed eyes while FEC corrects 1e-6 BER. Contrasts NRZ's two levels by halving baud rate for same throughput but shrinking margins 3x requiring precise ISI equalization.
Key characteristics of PAM4 include: Four Voltage Levels 00=-3/01=-1/10=+1/11=+3 units; Three Eyes stacked with 1/3 NRZ height each; 2b/symbol doubles NRZ capacity at same baud; DSP Intensive FFE+CTLE+DFE+FEC mandatory; Gray Coding adjacent levels differ by 1 bit minimizing errors.
Conceptual example of PAM4 usage:
module pam4_serdes_tx (
input clk_56g,
input [1:0] data_in, // 2 bits/symbol
output pam4_p, pam4_n
);
reg [1:0] gray_code;
reg [11:0] dac_levels = '{12'd0, 12'd850, 12'd1700, 12'd2550}; // 00/01/10/11
// Gray coding: 00→00, 01→01, 11→11, 10→10
always @(*) case(data_in)
2'b00: gray_code = 2'b00;
2'b01: gray_code = 2'b01;
2'b11: gray_code = 2'b11;
2'b10: gray_code = 2'b10;
endcase
// 12-bit DAC output stage
wire [11:0] pam4_level = dac_levels[gray_code];
// FFE pre-emphasis tap weights
wire [11:0] ffe_out = pam4_level + pre_tap1*c1 + post_tap1*c2;
assign pam4_p = ffe_out;
assign pam4_n = ~ffe_out;
// PRBS31 generator stresses PAM4 eyes
reg [30:0] lfsr;
assign data_in = lfsr ^ lfsr ? 2'b11 : 2'b00; // Worst-case patterns
endmodule
Conceptually, PAM4 stacks three NRZ eyes vertically—SerDes MLSE/DFE slicers resolve ambiguous middle levels while PRBS31 patterns validate bathtub curves for 400G DR8 links backhauling Bluetooth 200Gbps FHSS aggregators. Enables 1.6T spine fabrics where NRZ hits physics wall; contrasts GFSK constant envelope by demanding linear TX/RX amid VHDL-synthesized 224G optics.