/ˌdiː ɛs ˈsiː/
n. "VESA's visually lossless video compression enabling 8K@60Hz over DisplayPort HBR3 bandwidth limits."
DSC, short for Display Stream Compression, is a low-latency compression algorithm developed by VESA that achieves 3:1 ratios using DPCM prediction, YCoCg-R color transform, and entropy coding on pixel slices, enabling 4K@144Hz/8K@60Hz over existing DisplayPort 1.4 (25.92Gbps) and HDMI 2.1 links without perceptible artifacts. Processes frames in real-time (sub-microsecond latency) by dividing into independent slices (1/3-1/4 frame width), quantizing residuals after intra prediction—mandatory for USB4 UHBR20 tunnels exceeding raw pixel clocks.
Key characteristics of DSC include: Visually Lossless 3:1 compression (119Gbps 8K@60 → 40Gbps) imperceptible at normal viewing distances; Zero Latency real-time encoding/decoding (<1μs end-to-end); Slice-Based parallel processing of 1/3 frame widths with independent headers; YCoCg-R Color optimal for luma/chroma separation unlike RGB quantization; Rate Control maintains constant bitrate via qp adjustment without buffering.
Conceptual example of DSC usage:
/* DSC 1.2a encoder slice processing */
typedef struct {
uint32_t slice_width; // 1/3 frame width (e.g. 1280 for 3840x2160)
uint32_t slice_height; // 8-108 lines
int qp; // Quantization parameter [8-17]
bool intra_mode; // Force all-intra slice
} dsc_slice_config;
void dsc_encode_slice(uint16_t *rgb_pixels, uint8_t *compressed) {
// 1. YCoCg-R color transform
int16_t y, co, cg, r;
y = (rgb >> 2) + (rgb >> 1) + (rgb >> 2); [youtube](https://www.youtube.com)
co = (rgb >> 1) - (rgb >> 1);
cg = (rgb >> 1) - (rgb >> 2); [youtube](https://www.youtube.com)
// 2. DPCM prediction (left/above neighbors)
int16_t pred_y = prev_y + left_y >> 1;
int16_t res_y = y - pred_y;
// 3. Quantize + Huffman code
uint8_t quant_y = res_y >> qp;
huffman_encode(quant_y, compressed++);
// 4. Repeat for Co/Cg, rate control
}Conceptually, DSC shrinks raw pixel streams by predicting/chroma-subsampling within DisplayPort main stream attributes (MSA), enabling 4K@240Hz over DVI-era cables—slice headers negotiate compression ratio during link training alongside CTLE equalization. Decoder mirrors process instantly; gaming monitors auto-enable for VRR compatibility, stress-tested via PRBS patterns ensuring LFSR-generated video maintains 1e-12 BER through compressed pipeline.